Processor Module Error (Data Cache Parity); Hpmc Caused By A Data Cache Parity Error - HP Visualize b160L Supplementary Manual

Chap4.doc 77 Thu Jul 25 10:23:57 1996
Table 13
Dealing with HPMC (Uncorrectable Error)
SIMM pair identified in this procedure. Return the sys-
tem state (for example, FASTBOOT) to the original
condition.

HPMC Caused by a Data Cache Parity Error

An HPMC interruption is forced when a data parity
error is detected during a Load instruction to the mem-
ory address space or during a data cache flush opera-
tion.
Table 13 shows an example of the HPMC error infor-
mation retrieved from Stable Storage by the
PIM_INFO command during the Boot Administration
environment.

Processor Module Error (Data Cache Parity)

Word
Check Type
CPU State
Cache Check
TLB Check
Bus Check
Assists Check
Assists State
System Responder Address
System Requester Address
System Controller Status
Troubleshooting
Value
0x80000000
0x9e000004
0x40000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000nnn
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