Multi-Bit Memory Parity Error; Hpmc Caused By A Multi-Bit Memory Parity Error - HP Visualize b160L Supplementary Manual

Chap4.doc 70 Thu Jul 25 10:23:57 1996
Table 10
Troubleshooting
Dealing with HPMC (Uncorrectable Error)
HPMC Caused by a Multi-Bit Memory
Parity Error
An HPMC interruption is forced when a multi-bit
memory parity error is detected during a "DMA read"
operation of fetching an I/D cache line (32 bytes).
Table 10 shows an example of the HPMC error infor-
mation retrieved from Stable Storage by the
PIM_INFO command during the Boot Administration
environment.

Multi-Bit Memory Parity Error

Word
Check Type
CPU State
Cache Check
TLB check
Bus Check
Assists Check
Assists State
System Responder Address
System Requester Address
System Controller Status
70
Value
0x20000000
0x9e000004
0x00000000
0x00000000
0x00210004
0x00000000
0x00000000
0x00nnnnnn
0x00000000
0x00000nnn