Renesas Single-Chip Microcomputer M306NKT3 User Manual page 78

Emulation pod for m16c/6n group m16c/6n4, 6n5, 6nk, 6nl, 6nm and 6nn
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M306NKT3-RPD-E User's Manual
Read timing
BCLK
td(BCLK-CS)
CSi
ADi
/DBi
td(BCLK-AD)
ADi
BHE
td(BCLK-ALE)
ALE
th(BCLK-ALE)
RD
Write timing
BCLK
td(BCLK-CS)
CSi
ADi
/DBi
td(BCLK-AD)
ADi
BHE
td(BCLK-ALE)
ALE
th(BCLK-ALE)
WR,
WRL, WRH
Figure 4.2 Memory expansion mode and microprocessor mode (2 wait, accessing external area, using multiplex bus)
REJ10J0326-0400 Rev.4.00 Sep. 01, 2006
tcyc
td(AD-ALE) th(ALE-AD)
tdz(RD-AD)
td(AD-RD)
td(BCLK-RD)
tcyc
td(AD-ALE) th(ALE-AD)
td(BCLK-DB)
td(BCLK-WR)
tac3(RD-DB)
Hi-Z
tsu(DB-RD)
th(RD-DB)
th(BCLK-RD)
th(WR-CS)
td(DB-WR)
th(WR-DB)
th(BCLK-WR)
4. Hardware Specifications
th(BCLK-CS)
th(RD-CS)
th(BCLK-AD)
th(RD-AD)
th(BCLK-CS)
th(BCLK-DB)
th(BCLK-AD)
th(WR-AD)
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