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Serial Port
The CPLD handles the interface to the serial port. The four active lines of the serial port
connect to general-purpose I/O pins on the CPLD as follows.
Xchecker Cable
Header J21 provides an interface between the FPGA and an Xchecker cable. The
Xchecker cable can be used to perform configuration and readback operations on the
FPGA.
Serial Port
XC95108
Pin
CPLD Pin
RTS
TD
CTS
RD
XC95108
CPLD
level
shifters
Xchecker Pin
Virtex FPGA Pin
1 – VCC (+5V)
2 – RT
3 – GND
4 – RD
6 – TRIG
7 – CCLK
9 – DONE
10 – TDI
11 – DIN
12 – TCK
13 – PROGRAM
14 – TMS
15 – INIT
82
81
85
80
rd
cts
Serial Port
Connector
td
(J28)
rts
N/A
132
N/A
133
139
179
120
167
177
239
122
156
123
29
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