Renesas RL78/I1D Application Note page 33

RL78/I1D
B
Second A/D conversion
operation start
A/D conversion operation
is completed?
Yes
Maskable interrupt disable
A/D converter stop processing
R_ADC_Stop()
VDD voltage is less
than 2.4V ?
Yes
Updated status flag variable of
flash operation mode
Set the high-speed on-chip oscillator
return
Figure 4.19
R01AN3597EJ0100 Rev.1.00
Jan. 31, 2017
IE 1
No(branch in g_ad_busy = 1)
IE 1
No
g_flash_mode
_10_FLAHMODE_HS_ERROR
Set flash operation mode to
HS (high-speed main) mode
clock frequency to 16MHz
Updated status flag variable of
flash operation mode
Flash operation mode switching (HS) processing(2/2)
Operation state switching IAR
FLMWEN bit 1 :Rewriting the FLMODE register is enabled
FLMODE register C0H :HS (high-speed main) mode
FLMWEN bit 0 : Rewriting the FLMODE register is disabled
HOCODIV register 01H
g_flash_mode _04_FLAHMODE_HS
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