Renesas RL78/I1D Application Note page 20

RL78/I1D
Controlling the operation of the clocks

Clock operation status control register (CSC)
High-speed system clock operation control: Stopped
Subsystem clock operation control: Stopped
High-speed on-chip oscillator clock operation control: Operating
Symbol: CSC
7 6
MSTOP XTSTOP
1 1
Bit 7
MSTOP
X1 oscillation mode
0 X1 oscillator operating
X1 oscillator
1
stopped
Bit 6
XTSTOP
X1 oscillation mode
0 X1 oscillator operating
XT1 oscillator
1
stopped
Bit 1
MIOEN
0 High-speed on-chip oscillator operating
1 High-speed on-chip oscillator stopped
Bit 0
HIOSTOP
0 High-speed on-chip oscillator operating
1 High-speed on-chip oscillator stopped
Caution: For details on the register setup procedures, refer to RL78/I1D User's Manual: Hardware.
R01AN3597EJ0100 Rev.1.00
Jan. 31, 2017
5 4 3
0 0 0
0 0 0
High-speed system clock operation control
External clock input
mode
External clock from
EXCLK pin is valid
External clock from
EXCLK pin is invalid
Subsystem clock operation control
External clock input
mode
External clock from
EXCLKS pin is valid
External clock from
EXCLKS pin is invalid
High-speed on-chip oscillator clock operation control
High-speed on-chip oscillator clock operation control
Operation state switching IAR
2 1 0
0 MIOEN HIOSTOP
0 0
0
Input port mode
Input port
Input port mode
Input port
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