Renesas RL78/I1D Application Note page 23

RL78/I1D
4.7.6. 12-bit interval timer initialization
Figure 4.7 shows the flowchart of 12-bit interval timer initialization.
R_IT_Create
12-bit interval timer
reset control
12-bit interval timer
clock provision
12-bit interval timer count operation
stop
12-bit interval timer
Interrupt disable
12-bit interval timer
interrupt priority level setting
12-bit interval timer
Set interrupt period to 100ms
return
R01AN3597EJ0100 Rev.1.00
Jan. 31, 2017
PRR2 register
TMKARES bit
TMKARES bit
PER2 register
TMKAEN bit
ITMC register
RINTE bit = 0
MK1H register
TMKAMK bit
IF1H register
TMKAIF bit
PR11L register
TMKAPR1 bit
PR01L register
TMKAPR1 bit
ITMC register
Figure 4.7 12-bit interval timer initialization
Operation state switching IAR
1 :12-bit interval timer reset state
0 :12-bit interval timer reset release
1
0000H
: Count operation stop ( count clear)
1 : INTIT interrupt disable
0 : INTIT interrupt request flag clear
1
1 : INTIT interrupt priority level 3 (lowest)
05DBH
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