Pcm And I2C Interfaces - Quectel UG89 Hardware Design

Table 16: Pin Definition of the ADC Interfaces
Pin Name Pin No.
ADC 6
The following table describes the characteristic of the ADC function.
Table 17: Characteristic of the ADC
Parameter
ADC Voltage Range
ADC Resolution
NOTE
It is recommended to use a resistor divider circuit for ADC application.

3.11. PCM and I2C Interfaces

UG89 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
primary mode (short frame synchronization) and UG89 works as both master and slave.
UG89 works as a master device pertaining to I2C interface.
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256kHz,
512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz PCM_CLK at
16kHz PCM_SYNC.
UG89 supports 16-bit linear data format. The following figure shows the primary mode's timing relationship
with 8kHz PCM_SYNC and 2048kHz PCM_CLK.
UG89_Hardware_Design
Description
General-purpose analog to digital converter
Min. Typ.
0
12
UMTS/HSPA+ Module Series
UG89 Hardware Design
Max. Unit
1.2 V
bits
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