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The Special Function Registers (SFRs) are mapped to the internal data space in the
range 80
to FF
. The SFRs are accessible through direct addressing. The SFRs that
H
H
are located at addresses with address bit 0-2 equal to 0 (addresses 80
F8
) are bitaddressable. Each bit of the bitaddressable SFRs has bit address
H
corresponding to the SFR byte address and its position within the SFR byte. For
example, bit 7 of SFR at byte address 80
of the SFR bits span from 80
As the 128-SFR range is less than the total number of registers required, register
extension mechanisms are implemented to increase the number of addressable SFRs.
These mechanisms include:
• Mapping
• Paging
1.3.4.1
Special Function Register Extension by Mapping
SFR extension is performed at the system level by mapping. The SFR area is extended
into two portions: the standard (non-mapped) SFR area and the mapped SFR area.
Each portion supports the same address range 80
addressable SFRs to 256. To access SFRs in the mapped area, bit RMAP in SFR
SYSCON0 must be set by software. The mapped SFR area provides the same
addressing capabilities (direct addressing, bit addressing) as the standard SFR area. Bit
RMAP must be cleared by software to access the SFRs in the standard area. The
hardware does not automatically clear/set the bit.
SYSCON0
System Control Register 0
7
6
The functions of the shaded bits are not described here
Field
RMAP
User's Manual, V 0.1
to FF
.
H
H
5
4
-
-
Bits
Type Description
0
rw
Special Function Register Map Control
0
1
has a bit address of 87
H
to FF
H
3
2
The access to the standard SFR area is
enabled.
The access to the mapped SFR area is
enabled.
1-7
Fundamental Structure
, 88
H
H
. The bit addresses
H
, bringing the number of
H
Reset Value: XXXX XXX0
1
XC800
, 90
, ...,
H
B
0
RMAP
rw
2005-01
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