Interrupt Triggering Edge Control; Interrupt Flag Bit - Advantech UNO-3072 User Manual

Celeron m/ pentium m embedded automation computer with two pci slot extensions
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2.5.7 Interrupt Triggering Edge Control

The interrupt can be triggered by a rising edge or a falling edge of the
interrupt signal, as determined by the value in the interrupt triggering edge
control bit in the interrupt control register, as shown in Table 2.7.
Table 2.7: Interrupt Triggering Edge Control
DI0TE & DI1TE
0
1

2.5.8 Interrupt Flag Bit

The interrupt flag bit is a flag indicating the status of an interrupt. It is a
readable/writable bit. To find the status of the interrupt, you have to read
the bit value. To clear the interrupt, you have to write "1" to this bit. This
bit must first be cleared to service the next coming interrupt.
Table 2.8: Interrupt Flag Bit Values
DI0F & DI1F
Read
Write
Note: UNO-3072 provides built-in examples to show how to
deliver digital input functionality. Refer to console mode
examples in
C:\Program Files\Advantech\UNO\UNO_IsaDIO\Exam-
ples\Console.
(Please install DI/O driver from the UNO CD to use
these examples)
Triggering edge of interrupt signal
Falling edge trigger
Rising edge trigger
Interrupt Status
0
No interrupt
1
Interrupt occur
0
Don't care
1
Clear interrupt
21
Chapter 2

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