Assembly Language Syntax; Z8Plus Instruction Summary - ZiLOG Z8 PLUS User Manual

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Assembly Language Syntax

For proper instruction execution, assembly language syntax requires that the destination and source be spec-

ified as dst, src (in that order). The following instruction descriptions show the format of the object code

produced by the assembler. This binary format should be followed by users who prefer manual program

coding or who intend to implement their own assembler. Other third party assemblers can differ. Please

consult the software user's manual for detailed information.

Example: The contents of registers 43H and 08H are added, and the result is stored in 43H. The assembly

syntax and resulting object code are:

ASM:

ADD

OBJ:

In general, whenever an instruction format requires an 8-bit register address, that address can specify any

working register is used and an 8-bit address is required by the assembler, an E is pre-pended to the 4-bit

working register address. If, in the above example, the source register is a working register, the assembly

syntax and resulting object code are:

ASM:

ADD

OBJ:

NOTES:

Note that the 4-bit address R8 was expanded to 8-bits by pre-pending EH. This expansion occurs any

time a 4-bit address isspecified for an instruction that takes 8-bit operands.

See the device product specification to determine the exact register file range available. The register

file size varies by device type

PLUS

INSTRUCTION SUMMARY

The instructions marked with this symbol (†) have an identical set of addressing modes, which are encoded

for brevity. The upper nibble is described in Table 3-14, and the lower nibble is represented by []. The

second nibble's value is described in Table 3-15, and is found beside the applicable addressing mode pair.

For example, the op code of an ADC instruction using the addressing modes r (destination) and Ir (source)

is 13H.

43H,

08H

43H,

(ADD dst, src)

(OPC src, dst)

(ADD dst, src)

(OPC src, dst)

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