Notation And Binary Encoding - ZiLOG Z8 PLUS User Manual

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NOTATION AND BINARY ENCODING

The operands and status flags use a notational shorthand. Operands, condition codes, address modes, and their
notations are described in Table 3-12.
Table 3-12. Notational Shorthand
Notation Address Mode
cc Condition Code
r Working Register
R Register
or
Working Register
RR Indirect Register Pair
or
Working Register Pair
Ir Indirect Working Register
IR Indirect Register
or
Indirect Working Register
Irr Indirect Working Register
Pair
IRR Indirect Register Pair
or
Working Register Pair
X Indexed
DA Direct Address
RA Relative Address
IM Immediate
*See the device product specification to determine the exact register file range available. The register file size varies
by the device type.
Operand Range*
See Table 3-11, condition codes
Rn n = 0 – 15
Reg Reg. represents a number in the range of
00H to FFH
Rn n = 0 – 15
Reg p = 0, 2, 4, 6, 8, 10, 12, or 14
RRp
@Rn n = 0 –15
@Reg Reg. represents a number in the range of
00H to FFH
@Rn n = 0– 15
@RRp p = 0, 2, 4, 6, 8, 10, 12, or 14
@Reg Reg. represents an even number in the
range 00H to FFH
@RRp p=0, 2, 4, 6, 8, 10, 12, or 14
Reg (Rn) Reg. represents a number in the range of
00H to FFH
n = 0 – 15
Addrs Addrs. represents a number in the range
of 0000H to FFFFH
Addrs Addrs. represents a number in the range
of +127 to –128 which is an offset relative
to the address of the next instruction
#Data Data is a number between 00H to FFH