VersaLogic VL-EPU-4011 Reference Manual page 34

System Setup
Option: LPSS SPI #1 Support (D25:F0)
Disable (default)
PCI Mode
ACPI Mode
Details: Enable/Disable LPSS SPI #1 Support
Option: LPSS IOSF PMCTL S0ix Enable
Disable
Enable (default)
Details: Enable LPSS IOSF Bridge PMCTL Register S0ix Bits
---- LPSS Clock Gating Configuration ----
Option: LPSS I2C #1 Clock Gating Configuration
Disable
Enable (default)
Details: Enable/Disable LPSS I2C #1 Clock Gating
Option: LPSS I2C #2 Clock Gating Configuration
Disable
Enable (default)
Details: Enable/Disable LPSS I2C #2 Clock Gating
Option: LPSS HSUART #3 Clock Gating Configuration
Disable
Enable (default)
Details: Enable/Disable LPSS HSUART #3 Clock Gating
Option: LPSS SPI #1 Clock Gating Configuration
Disable
Enable (default)
Details: Enable/Disable LPSS SPI #1 Clock Gating
VL-EPU-4011 BIOS Reference Manual 34