Figure 4. Power Supply Scheme For Stm32U575Xq And Stm32U585Xq (With Smps) - ST STM32U575 Series Application Note

Figure 4.
Note: • SMPS and LDO regulators provide, in a concurrent way, the V
requirements. However, only one of them is active at the same time. When SMPS is active, it feeds the
V on the two VDD11 pins provided through the SMPS VLXSMPS output pin. A 2.2 µH coil and a
CORE
2.2 μF capacitor on each VDD11 pin are then required. When LDO is active, it provides the V
regulates it using the same decoupling capacitors on VDD11 pins.
• It is recommended to add a decoupling capacitor of 100 nF near each VDD11 pin/ball, but it is not
mandatory.
AN5373 - Rev 1
Power supply scheme for STM32U575xQ and STM32U585xQ (with SMPS)
VBAT
1.65 – 3.6 V
3.3 V
VDDUSB
100 nF
V
DD
VDDSMPS
10 µF
VLXSMPS
2.2 µH
2 x VDD11
2 x 2.2 µF
VSSSMPS
V
DD
n x VDD
n x 100 nF
GPIOs
+ 10 µF
n x VSS
V
DDIO2
m x VDDIO2
m x100 nF
+ 4.7 µF
GPIOs
m x VSS
V
DDA
VDDA
V
REF
100 nF
+ 1 µF
100 nF+ 1 µF
VSSA
Power switch
Voltage regulator
SMPS
SMPS ON
SMPS OFF
LDO
V
DDIO1
OUT
IN
V
DDIO2
OUT
IN
ADCs/
DACs/
V
REF+
OPAMPs/
V
REF-
COMPs/
VREFBUF
supply depending on application
CORE
AN5373
Power supply schemes
Backup circuitry
(LSE, RTC, TAMP,
backup registers,
backup SRAM)
V
CORE
Kernel logic
(CPU, digital
and memories)
IO
logic
IO
logic
and
CORE
page 10/37