Swj-Dp Connection With Standard Jtag Connector; Serial-Wire Debug (Swd) Pin Assignment; Internal Pull-Up And Pull-Down On Swd Pins; Table 8. Swd Port Pins - ST STM32U575 Series Application Note

6.2.4

SWJ-DP connection with standard JTAG connector

The figure below shows the connection between the device and a standard JTAG connector.
STM32U5 MCU
JTCK/SWCLK
6.3

Serial-wire debug (SWD) pin assignment

The same SWD pin assignment, detailed in the table below, is available on all packages.
SWD pin
SWDIO
SWCLK
After reset, the pins used for the SWD are assigned as dedicated pins that can be immediately used by the
debugger host.
However, the MCU offers the possibility to disable the SWD, therefore releasing the associated pins for GPIO use.
For more details on how to disable SWD port, refer to the section 'I/O pin alternate function multiplexer and
mapping' of the reference manual.
6.3.1

Internal pull-up and pull-down on SWD pins

Once the SWD I/O is released by the user software, the GPIO controller takes control of it. The reset states of the
GPIO control registers put the I/Os in the equivalent states:
• SWDIO: alternate function pull-up
• SWCLK: alternate function pull-down
Having embedded pull-up and pull-down resistors removes the need to add external resistors.
AN5373 - Rev 1
Figure 9.
nJTRST
JTDI
JTMS/SWDIO
JTDO
nRST
Type
Input/Output Serial-wire data input/output
Input Serial-wire clock
JTAG connector implementation
V
DD
10 kΩ
10 kΩ
Table 8. SWD port pins
SWD port
Debug assignment
Serial-wire debug (SWD) pin assignment
JTAG connector
V
DD
Connector 2 x 10
VTREF
(2)
(1)
nTRST
(4)
(3)
TDI
(6)
(5)
TMS
(8)
(7)
TCK
(10)
(9)
RTCK
(12)
(11)
TDO
(14)
(13)
nSRST
(16)
(15)
DBGRQ
(18)
(17)
DBGACK
(20)
(19)
10 kΩ
V
Pin assignment
PA13
PA14
AN5373
SS
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