Defective State - Siemens SIMATIC PCS 7 System Manual

Operator controls and operating modes of the CPU 410-5H
7.1 Operating modes of the CPU 410-5H
4. If a multiple-bit error occurs on a CPU in redundant operation, that CPU will switch to
ERROR-SEARCH operating state. The other CPU becomes master, if necessary, and
continues running in solo operation.
But: OB 84 is called if 2 or more single-bit errors occur on a CPU in redundant operation
within 6 months. The CPU does not change to ERROR-SEARCH operating state.
5. If synchronization is lost during redundant operation, the standby CPU changes to
ERROR-SEARCH operating state. The other CPU remains master and continues running
in solo operation.
For additional information on the self-test, refer to Chapter Self-test (Page 110)
7.1.7

DEFECTIVE state

The CPU enters the DEFECTIVE state when an error occurred that cannot be automatically
eliminated by the operating system.
Reaction of the CPU
The reaction of the CPU in the DEFECTIVE state is intended to leave this state, if possible,
and to restart.
The CPU reacts as follows in DEFECTIVE state:
1. The CPU writes the cause of the defect into the diagnostic buffer.
2. The CPU generates the current service data.
3. The CPU checks if a reboot is possible.
A reboot is not possible in the following cases:
– There is an inconsistency in the user data.
– A reboot was performed within the last 24 hours.
– The event which has caused the defect prevents an automatic reboot.
4. The CPU logs the automatic reboot in the diagnostics buffer (event W#16#4309 "Memory
reset started automatically").
5. The CPU performs an automatic reboot.
6. The CPU starts up without backup.
7. In stand-alone operation and in single mode, the CPU loads the backed up user program
and performs a warm restart.
In redundant mode, the standby CPU links up to the running master.
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CPU 410-5H Process Automation/CPU 410 SMART
System Manual, 09/2014, A5E32631667-AB