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PCI-DAS6030 & PCI-DAS6032 User's Guide
Functional Details
Use the SYNC CLCK signal to determine the master/slave configuration of a DAQ-Sync-enabled system. Each
system can have one master and up to three slaves. SYNC CLK is the 40 MHz time-base used to derive all
board timing and control. The master provides this clock to the slave boards so that all boards in the DAQ-sync-
enabled system are timed from the same clock.
Figure 4. Block diagram – PCI-DAS6030/32
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