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I n t e r f a c e s
PAG E 5 6
A1.1
E1(2-Mbit/s) Interface
This interface supports up to 32 64-kbit/s channels using ITU recommenda-
tion G.703/G.704.
A1.1.1
Unbalanced E1 Interface
TAB. 3
Socket: Data in / Data out (BNC)
Pin
1
2
1
2
TAB. 4
Socket: Clock in / Clock out (BNC)
Pin
1
2
A1.1.2
Balanced E1 Interface
1
5
TAB. 5
9
6
Socket: E1/T1 balanced (SUB-D, 9-pole)
Pin
1
2
3
4
5
6
7
8
9
PIN ASSIGNMENT: UNBALANCED E1 INTERFACE
Signal
Data - F1 in / F1 out
Ground
PIN ASSIGNMENT: UNBALANCED CLOCK INTERFACE
Signal
Data - T3 in / T3 out
Ground
PIN ASSIGNMENT: BALANCED E1/T1 INTERFACE
Signal
Shield
RXD a
Data in a
TXD a
Data out a
RXCLK a
Clock in a
TXCLK a
Clock out a
RXD b
Data in b
TXD b
Data out b
RXCLK b
Clock in b
TXCLK b
Clock out b
Electrical characteristics
Amplitude:
3 V
pp
75 Ω unbalanced
Impedance:
Range:
100 m
Electrical characteristics
Amplitude:
0.5 ... 1.9 V
(Input)
0p
1.5 V
(Output)
0p
75 Ω unbalanced
Impedance:
Range:
100 m
Electrical characteristics
Amplitude:
3 V
acc. G.703
pp
120 Ω bal.
Impedance:
Range:
100 m
Clock:
Amplitude:
0.5 bis 1.9 V
(Input)
0p
1.5 V
(Output)
0p
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