Xycom XVME-400 Manual page 49

XVME-400/40l/490/491 Manual
October, 1989
Connector
a n d
Signal
Pin Number
Mnemonic
IACK* 1A:20
IRQl*- 1 B:24-30
IRQ7*
LWORD* lC:l3
(RESERV- 2B:3
ED)
SERCLK
lB:21
SERDAT
1B:22
SYSCLK
1A:l0
Table A-l. VMEbus Signal Identification (cont'd)
Signal Name and Description
INTERRUPT ACKNOWLEDGE: Open-collector or three-
state driven signal from any master processing an interrupt
request. It is routed via the backplane to slot 1, where it
is looped-back to become slot
the interrupt acknowledge daisy-chain.
INTERRUPT REQUEST
signals, generated by an interrupter, which carry
prioritized interrupt requests. Level seven is the highest
priority.
LONGWORD: Three-state driven signal indicates that the
current transfer is a 32-bit transfer.
RESERVED: Signal line reserved for future VMEbus
enhancements. This line must not be used.
A
reserved signal which will be used as the clock for a
serial communication bus protocol which is still being
finalized,
A reserved signal which will be used as the transmission
line for serial communication bus messages.
SYSTEM CLOCK:
independent of processor speed or timing. It is used for
general system timing use.
(1-7): Open-collector driven
constant 16-MHz clock signal that is
A
A-4
in order to start
1 IACKIN*