General Programming Considerations - Xycom XVME-400 Manual

XVME-400/40l/490/491 Manual
October, 1989

3.7 GENERAL PROGRAMMING CONSIDERATIONS

This section outlines programming rules which apply to all modes of operation. These
constraints are dictated by hardware configurations.
WRl - Set D7, D6, D5 to 0, 1, 0. This will disable the DMA and WAIT features of the
SCCs. Polled or interrupt operation must be used.
D5, D4 must not be programmed for external sync modes of operation.
WR4-
Set Dl to 0. This will enable the interrupt vector feature of the SCC. There
WR9-
are no other sources of IACK vectors on the module.
Set D7 to 0. This will disable the external crystal oscillator feature of the SCC.
WRll-
The SCC pin /TRXC must not be programmed as a clock source for the receiver
(D6,D5) or the transmitter (D4,D3). Set D2 to 1 to select the /TRXC pin as an
output.
WR14 - Set D2 to 0 to program the DTR/REQ pin to the DTR function.
Asynchronous
3.7.1
This section describes the steps required to set up the SCCs for asynchronous operation.
These steps apply to any channel and should be followed in the specified order.
Issue the Channel Reset command (WR9:D7,6).
1)
Set WR4 as follows clock mode in D7,D6 (16X is suggested); number of stop bits
2)
in D3,D2; and parity odd/even/enable in Dl, DO.
Set WR3 as follows: number of receive bits/character in D7,D6;
3)
as required in D5; receiver disable DO=O.
Set WR5 as follows: state of DTR and CTS in D7, Dl; number of transmit
4)
bits/character in D6,D5;
Set WRl0 for NRZ D6,D5=0,0.
5)
Set interrupt or polled operation (refer to Section 3.3).
6)
Set clocking options (refer to Section 3.4).
7)
Enable receiver (WR:DO) and transmitter (WR5:D3)
8)
Operation Initialization
transmitter disable D3=0.
3-10
auto enables
as required.