Download Print this page

Xycom XVME-400 Manual page 47

Quad serial i/o modules

Advertisement

XVME-400/40l/490/491 Manual
October, 1989
Connector
and
Signal
Pin Number
Mnemonic
1 A:24-30
A0I-A23
lC:15-30
2B:4-11
A24-A3 1
BBSY*
1B:l
BCLR*
IB:2
BERR*
1C:ll
BG0IN*-
1 B:4,6,
BG3IN*
BG0OUT*-
lB:5,7,
BG3OUT*
Table A-l. VMEbus Signal Identification (cont'd)
Signal Name and Description
ADDRESS BUS (bits l-23): Three-state driven address lines
that specify a memory address.
ADDRESS BUS (bits 24-31): Three-state driven bus
expansion address lines.
BUS BUSY: Open-collector driven signal generated by the
current DTB master to indicate that it is using the bus.
BUS CLEAR: Totem-pole driven signal generated by the
bus arbitrator to request release by the DTB master
higher level is requesting the bus.
BUS ERROR: Open-collector driven signal generated by a
slave. It indicates that an unrecoverable error has occurred
and the bus cycle must be aborted.
BUS GRANT (0-3) IN: Totem-pole driven signals generated
8,l0
by the Arbiter or Requesters. Bus Grant In and Out signals
form a daisy-chained bus grant. The Bus Grant In signal
indicates to this board that it may become the next bus
master.
BUS GRANT (0-3) OUT: Totem-pole driven signals
9,ll
generated by Requesters. These signals indicate that a
DTB master in the daisy-chain requires access to the bus.
A-2
if
a

Advertisement

loading
Need help?

Need help?

Do you have a question about the XVME-400 and is the answer not in the manual?

This manual is also suitable for:

Xvme-401Xvme-490Xvme-491