Fujitsu M2361A Customer Engineering Manual page 174

(7) 2-7 decoder
The 2-7 decoder converts the 2-7 data into NRZ data.
The 2-7 data synchronized with 2F clock sent from VFO circuit is input to
an eight-bit shift register, then sent to a decoder in which the 2-7 data
is converted to NRZ data according to the conversion table listed in Table
4.6.4.
A read command starts the decoder detecting all 1 gap data. When this
data is detected, the 2F clock is toggled to VFO clock (VFOCLK) to
transfer the data. The 2-7 data is converted to NRZ data by gating
VFOCLK. The NRZ data synchronized with VFOCLK is sent to the controller.
Figure 4.6.4.37 shows the abbreviated block diagram of the 2-7 decoder.
B03P-4825-0002A ••• 02
4 -
103