Chapter 4
Theory of Operation
4.1 The SBus Interface
The CPU card communicates with the GXTRA card through the
SBus interface. The SBus interface is the mechanism for
communications between the CPU card and the GXTRA card.
This interface is fully described in the SBus Specification B.0
included in the SBus Developer's kit. The SBus interface is
embodied in a PAL on the GXTRA card. The PAL controls all
transactions between the SBus and the GXTRA card. These
transactions include reading and/or writing the various registers
within the SBus interface, the GXTRAengine and the random
access memory digital-to-analog-converter (RAMDAC) as well as
the PROM and Video RAM memory. In addition, the
GXTRAengine generates the video timing and control for the
Video RAM's, and the RAMDAC.
The GXTRA card must be plugged into the SBus connector of
the CPU card.
The GXTRA card is an SBus slave device, therefore it may be
placed in any of the SBus slots.
4.2 The GXTRAengine
The GXTRAengine is the heart of the GXTRA card architecture.
It contains the hardware to do 2D graphic renderings. The
rendering hardware can execute three basic types of commands:
QUAD, BLIT, and PIXEL1. The GXTRAengine uses the Weitek
Power 9100 graphics chip.
4.2.1 QUAD Command
The GXTRAengine has the capability of drawing quadrilaterals.
It contains two Bresenham line drawing engines that calculate
4-1
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