STMicroelectronics STEVAL-IME008V1 Wiring Manual And Hardware Reference page 8

Schematic diagrams
When using backup oscillator X1,
R126 have to be mounted and R6
must be unplaced.
MCU_FPGA_OSC_EN
Two right-angle, 12-pin
(2 x 6 female) Peripheral
Module (PMOD) headers
(J8, J9) are interfaced to
the FPGA, with each
header providing 3.3 V
power, ground, and
eight I/O's. These headers
may be utilized as
general-purpose I/Os
or may be used to
interface to PMODs.
J6 and J8 are placed in
close proximity
(0'9" -centers) on the
PCB in order to
support dual PMODs.
8/19
Figure 7. STEVAL-IME008V1 circuit schematic (7 of 16)
66MHZ EXTERNAL OSCILLATOR
+VFPGA_IO_3V3
R126
10k
BACKUP OF U5
X1
1 4
OE ST VCC
2 3
GND OUT
FPGA_CLK_66MHZ
Place R7 (1%) close to the clock
source DS1088LU-66 device
PERIPHERRAL MODULE (PMOD)
+VFPGA_IO_3V3
FPGA_PMOD1_P1
FPGA_PMOD1_P3
FPGA_PMOD1_P7
FPGA_PMOD1_P9
+VFPGA_IO_3V3
FPGA_PMOD2_P1
FPGA_PMOD2_P3
FPGA_PMOD2_P7
FPGA_PMOD2_P9
DocID026791 Rev 2
U5
2
VCC PDN
3
VCC
7
n/c
8
n/c GND
R7
1
OUT GND
33R2
DS1088LU-66
66MHZ OSC
C25 C26
100nF 10uF 10V 0805
PMOD1
NOT ASSEMBLY
J8
1 2
3 4
5 SX 6
7 8
9 10
11 12
C26, C27, C30 and C31 Detail
TDK (C2012X7R1A106K) - DIGIKEY (445-6857-2-ND)
HEADER 6X2
Dimension 0805 - EIA 2012
C29 C30
100nF 10uF 10V 0805
PMOD2
J9 NOT ASSEMBLY
1 2
3 4
5 DX 6
7 8
9 10
11 12
HEADER 6X2
STEVAL-IME008V1
C19 C20
100nF 10nF
MCU_FPGA_OSC_EN
6
R6
4
10K NM
5
+VFPGA_IO_3V3
C27 C28
100nF
10uF 10V 0805
FPGA_PMOD1_P2
FPGA_PMOD1_P4
FPGA_PMOD1_P8
FPGA_PMOD1_P10
+VFPGA_IO_3V3
C31 C32
10uF 10V 0805
100nF
FPGA_PMOD2_P2
FPGA_PMOD2_P4
FPGA_PMOD2_P8
FPGA_PMOD2_P10
GSPG30072014DI1210