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STMicroelectronics STEVAL-IME008V1 Wiring Manual And Hardware Reference
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STMicroelectronics STEVAL-IME008V1 Wiring Manual And Hardware Reference

Ultrasound pulser ic evaluation board
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Features
• 4-channel outputs: high voltage and low
voltage BNC connectors
• Load simulator using signal equivalent circuits
• Possibility to set up own load simulator
• 16 preset waveforms
• USB connector to connect STM32 with PC and
supply power to it
• 4 MB serial Flash memory to host FPGA code
and waveforms
• Memory expansion connector to add external
serial Flash
• Connectors to supply high voltage and low
voltage to the STHV749 output stage
• LEDs to monitor the power management stage
• Human machine interface to select, start and
stop the generation of the preset waveforms
• 25 LEDs to monitor board behavior
• RoHS compliant
August 2015
For further information contact your local STMicroelectronics sales office.
STHV749 Ultrasound Pulser IC evaluation board
DocID026791 Rev 2
STEVAL-IME008V1
Description
The STEVAL-IME008V1 is a product evaluation
board designed around the STHV749 4-channel
7-level high voltage pulser, a state-of-the-art
device designed for ultrasound imaging
applications.
The output waveforms can be displayed directly
on an oscilloscope by connecting the scope probe
to the relative BNCs. 16 preset waveforms are
available to test the HV pulser under varying
conditions.
Data brief
1/19
www.st.com

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Summary of Contents for STMicroelectronics STEVAL-IME008V1

  • Page 1 • Human machine interface to select, start and stop the generation of the preset waveforms • 25 LEDs to monitor board behavior • RoHS compliant August 2015 DocID026791 Rev 2 1/19 For further information contact your local STMicroelectronics sales office. www.st.com...
  • Page 2 Schematic diagrams STEVAL-IME008V1 Schematic diagrams Figure 1. STEVAL-IME008V1 circuit schematic (1 of 16) GSPG30072014DI1135 2/19 DocID026791 Rev 2...
  • Page 3 STEVAL-IME008V1 Schematic diagrams Figure 2. STEVAL-IME008V1 circuit schematic (2 of 16) GSPG30072014DI1140 DocID026791 Rev 2 3/19...
  • Page 4 Schematic diagrams STEVAL-IME008V1 Figure 3. STEVAL-IME008V1 circuit schematic (3 of 16) GSPG30072014DI1150 4/19 DocID026791 Rev 2...
  • Page 5 STEVAL-IME008V1 Schematic diagrams Figure 4. STEVAL-IME008V1 circuit schematic (4 of 16) STHV800 Power Management HVPCW HVPCW HVPCW HVP1 HVP1 HVP1 HVP0 HVP0 HVP0 22000n 100V 22000n 100V J1 Details 22000n 100V RS 2X(193-0564) 100V 100V 100V Phoenix Contact (Mfg Code MKDS 1.5/2-5.08)
  • Page 6 Schematic diagrams STEVAL-IME008V1 Figure 5. STEVAL-IME008V1 circuit schematic (5 of 16) GSPG30072014DI1200 6/19 DocID026791 Rev 2...

  • Page 7: Test Point

    STEVAL-IME008V1 Schematic diagrams Figure 6. STEVAL-IME008V1 circuit schematic (6 of 16) FPGA - Bank 1 FPGA_PMOD1_P2 IO_1_L01N_A24_VREF FPGA_PMOD1_P1 IO_1_L01P_A25 FPGA_PMOD1_P4 IO_1_L29N_A22_M1A14 FPGA_PMOD1_P3 IO_1_L29P_A23_M1A13 FPGA_PMOD1_P8 IO_1_L30N_A20_M1A11 FPGA_PMOD1_P7 IO_1_L30P_A21_M1RESET FPGA_PMOD1_P10 IO_1_L31N_A18_M1A12 FPGA_PMOD1_P9 IO_1_L31P_A19_M1CKE FPGA_PMOD2_P2 IO_1_L32N_A16_M1A9 FPGA_PMOD2_P1 IO_1_L32P_A17_M1A8 FPGA_PMOD2_P4 IO_1_L33N_A14_M1A4 FPGA_PMOD2_P3 IO_1_L33P_A15_M1A10 FPGA_PMOD2_P8...
  • Page 8 Schematic diagrams STEVAL-IME008V1 Figure 7. STEVAL-IME008V1 circuit schematic (7 of 16) 66MHZ EXTERNAL OSCILLATOR When using backup oscillator X1, R126 have to be mounted and R6 +VFPGA_IO_3V3 must be unplaced. 100nF 10nF R126 BACKUP OF U5 MCU_FPGA_OSC_EN MCU_FPGA_OSC_EN OE ST...

  • Page 9: Push Buttons

    STEVAL-IME008V1 Schematic diagrams Figure 8. STEVAL-IME008V1 circuit schematic (8 of 16) PUSHBUTTONS +VFPGA_IO_3V3 +VFPGA_IO_3V3 10K 0402 10K 0402 SEL_PROG_PB SW PUSHBUTTON-DPST START_PB SW PUSHBUTTON-DPST PROGRAM START 100nF 100nF +VFPGA_IO_3V3 +VFPGA_IO_3V3 SW PUSHBUTTON-DPST 10K 0402 FPGA RESET STOP_PB SW PUSHBUTTON-DPST FPGA_RESET...
  • Page 10 Schematic diagrams STEVAL-IME008V1 Figure 9. STEVAL-IME008V1 circuit schematic (9 of 16) GSPG30072014DI1220 FPGA - Bank 2 FPGA_MODE0 IO_2_L01N_M0_CMPMISO CCLK IO_2_L01P_CCLK IO_2_L02N_CMPMOSI IO_2_L02P_CMPCLK FPGA_SPI_MOSI IO_2_L03N_MOSI_CSI_B_MISO0 FPGA_SPI_MISO1 IO_2_L03P_D0_DIN_MISO_MISO1 IO_2_L05N IO_2_L05P FPGA_SPI_MISO3 IO_2_L12N_D2_MISO3 FPGA_SPI_MISO2 IO_2_L12P_D1_MISO2 IO_2_L13N_D10 FPGA_MODE1 IO_2_L13P_M1 IO_2_L14N_D12 IO_2_L14P_D11 IO_2_L15N IO_2_L15P IO_2_L16N_VREF...

  • Page 11: Fpga Configuration

    STEVAL-IME008V1 Schematic diagrams Figure 10. STEVAL-IME008V1 circuit schematic (10 of 16) FPGA CONFIGURATION +VFPGA_IO_3V3 10K 0402 2K43 0402 DNP 2K43 0402 FPGA_INIT_B MCU_FPGA_INIT_B FPGA_MODE0 FPGA_MODE1 MCU_FPGA_MODE1 2K43 0402 DNP 2K43 0402 Configuration mode selection: FPGA_MODE0 = Parallel (Low) or Serial (High)
  • Page 12 Schematic diagrams STEVAL-IME008V1 Figure 11. STEVAL-IME008V1 circuit schematic (11 of 16) PROGRAM SELECTOR LEDS PROG 0 PROG 8 PROG_LED0 PROG_LED8 68R 0402 YELLOW 68R 0402 YELLOW PROG 1 PROG 9 PROG_LED1 PROG_LED9 68R 0402 YELLOW 68R 0402 YELLOW PROG 2...
  • Page 13 STEVAL-IME008V1 Schematic diagrams Figure 12. STEVAL-IME008V1 circuit schematic (12 of 16) GSPG30072014DI1240 DocID026791 Rev 2 13/19...
  • Page 14 Schematic diagrams STEVAL-IME008V1 Figure 13. STEVAL-IME008V1 circuit schematic (13 of 16) GSPG30072014DI1245 14/19 DocID026791 Rev 2...
  • Page 15 STEVAL-IME008V1 Schematic diagrams Figure 14. STEVAL-IME008V1 circuit schematic (14 of 16) OPTIONAL FPGA I/O STM32_GPIO_0 0R - N/A FPGA_GPIO0 STM32_GPIO_1 FPGA_GPIO1 0R - N/A STM32_GPIO_2 0R - N/A FPGA_GPIO2 STM32_GPIO_3 0R - N/A FPGA_GPIO3 FPGA_GPIO[0:7] STM32_GPIO_4 FPGA_GPIO4 0R - N/A...
  • Page 16 Schematic diagrams STEVAL-IME008V1 Figure 15. STEVAL-IME008V1 circuit schematic (15 of 16) GSPG30072014DI1255 16/19 DocID026791 Rev 2...
  • Page 17 STEVAL-IME008V1 Schematic diagrams Figure 16. STEVAL-IME008V1 circuit schematic (16 of 16) MCU_3V3 RESET# C117 MCU RESET 100nF RST2 SW PUSHBUTTON-DPST Not Assembly RS (505-9186) C&K (Y78B22110FP) OSCILLATOR OSCIN OSCOUT 8MHZ OSC 8MHz Murata (CSTCE8M00G55-R0) DigiKey (490-1195-1-ND) RS: 283-961 Farnell: 1615352...

  • Page 18: Revision History

    Revision history STEVAL-IME008V1 Revision history Table 1. Document revision history Date Revision Changes 06-Aug-2014 Initial release. 06-Aug-2015 Updated title on the cover page. 18/19 DocID026791 Rev 2...
  • Page 19 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders.