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MDP Based Key Phrase Detection Demonstration
User Guide
Contents
Acronyms in This Document ................................................................................................................................................. 3
1.
Introduction .................................................................................................................................................................. 4
2.
Functional Description .................................................................................................................................................. 4
3.
MDP Board Setup.......................................................................................................................................................... 5
4.
Programming the Key Phrase Detection Demo ............................................................................................................ 7
5.
Running the Key Phrase Detection Demo ................................................................................................................... 11
Technical Support ............................................................................................................................................................... 12
Revision History .................................................................................................................................................................. 12
Figures
Figure 2.1. Key Phrase Detection Demo Diagram ................................................................................................................. 4
Figure 3.1. MDP Board with Configuration Locations Highlighted ....................................................................................... 5
Figure 4.1. Create a New Blank Project ................................................................................................................................ 7
Figure 4.2. Bitstream File Settings ........................................................................................................................................ 8
Figure 4.3. Filter Bank Coefficient File Settings .................................................................................................................... 9
Figure 4.4. Binary Firmware File Settings ........................................................................................................................... 10
Figure 5.1. LED Location...................................................................................................................................................... 11
Tables
Table 3.1. MDP Board Configuration Details ........................................................................................................................ 6
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
2
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0
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