Appendix; Digidoc 80-Port Post Error Code List - CHAINTECH 7NJS Ultra User Manual

Digidoc 80-Port POST Error Code List

POST (hex)
CF
C0
C1
C3
C5
01
03
05
07
08
0A
0E
10
12

Appendix

Test CMOS R/W functionality.
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers.
Detect memory:
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache (socket 7 or below)
Expand compressed BIOS code to DRAM.
Call chipset hook to copy BIOS back to E000 & F000
shadow RAM.
Expand the Xgroup codes locating in physical address
1000:0
Initial Superio_Early_Init switch.
1.Blank out screen.
2.Clear CMOS error flag.
1. Clear 8042 interface.
2. Initialize 8042 self-test.
1. Test special keyboard controller for Winbond 977 series
Super I/O chips.
2. Enable keyboard interface.
1. Disable PS/2 mouse interface (optional).
2. Auto detects ports for keyboard & mouse followed by a
port & interface swap (optional).
3. Reset keyboard for Winbond 977 series Super I/O chips.
Test F000h segment shadow to see whether it is R/W-able
or not. If test fails, keep beeping the speaker.
Auto detect flash type to load appropriate flash R/W codes
into the run time area in F000 for ESCD & DMI support.
Use walking 1's algorithm to check out interface in CMOS
circuitry. Also set real-time clock power status, and then
check for override.
Digidoc 80-Port POST Error Code List
Description
79