Parallel Programming Characteristics - Atmel AVR ATmega103 Manual

Parallel Programming
Characteristics
0945G–09/01
Figure 76. Parallel Programming Timing
XTAL1
t
DVXH
Data & Contol
(DATA, XA0/1, BS1)
t
BVXH
PAGEL
WR
RDY/BSY
OE
DATA
Table 41. Parallel Programming Characteristics T
Symbol Parameter
V Programming Enable Voltage
PP
I Programming Enable Current
PP
t Data and Control Valid before XTAL1 High
DVXH
t XTAL1 Pulse Width High
XHXL
t Data and Control Hold after XTAL1 Low
XLDX
t XTAL1 Low to WR Low
XLWL
t BS1 Valid before XTAL1 High
BVXH
t PAGEL Pulse Width High
PHPL
t BS1 Hold after PAGEL Low
PLBX
t PAGEL Low to WR Low
PLWL
t BS1 Valid to WR Low
BVWL
t BS1 Hold after RDY/BSY High
RHBX
t WR Pulse Width Low
WLWH
t WR High to RDY/BSY Low
WHRL
t WR Low to RDY/BSY High
WLRH
t XTAL1 Low to OE Low
XLOL
t OE Low to DATA Valid
OLDV
t OE High to DATA Tri-stated
OHDZ
t WR Pulse Width Low for Chip Erase
WLWH_CE
t WR Pulse Width Low for Progr. the Fuse Bits
WLWH_PFB
Notes: 1. Use t
WLWH_CE
2. If t is held longer than t
WLWH
t
XLWL
t
XHXL
t
XLDX
t t
PLBX BVWL
t
PHPL
t
WLWH
t
PLWL
t
XLOL
(1)
(2)
(2)
for Chip Erase and t
WLWH_PFB
, no RDY/BSY pulse will be seen.
WLRH
ATmega103(L)
t
RHBX
t
WHRL
t
WLRH
t
OHDZ
t
OLDV
= 25 ° C ± 10%, V
= 5V ± 10%
A CC
Min Typ Max
11.5 12.5
67
67
67
67
67
67
67
67
67
67
67
20
0.5 0.7
67
20
5 10
1.0 1.5
for programming the fuse bits.
Units
V
250 µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.9 ms
ns
ns
20 ns
15 ms
1.8 ms
107