Atmel AVR ATmega103 Manual page 91

Port D Schematics
0945G–09/01
serve this function. See the Timer/Counter1 description on how to operate this function.
The internal pull-up MOS resistor can be activated as described above.
• T1 – Port D, Bit 6
T1, Timer/Counter1 counter source. See the timer description for further details.
• T2 – Port D, Bit 7
T2, Timer/Counter2 counter source. See the timer description for further details.
Note that all port pins are synchronized. The synchronization latches are, however, not
shown in the figures.
Figure 62. Port D Schematic Diagram (Pins PD0, PD1, PD2 and PD3)
MOS
PULL-
UP
PDn
WP: WRITE PORTD
WD: WRITE DDRD
RL: READ PORTD LATCH
RP: READ PORTD PIN
RD: READ DDRD
n: 0, 1, 2, 3
ATmega103(L)
RD
RESET
R
Q D
DDDn
C
WD
RESET
R
Q D
PORTDn
C
RL
WP
RP
INTn
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