Table of Contents
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J3, J4, or J5 signal restrictions
J4 connector
4-5
as bus master
2-5
J4 transition module connector
J5 connector
4-6
J5 transition module connector
J6/J24 transition module connectors
J7 connector
4-16
as part of RAM300 alignment
J7 transition module connector
J8 connector
4-10
J8/J9 jumpers
settings for DCE
B-5
settings for DTE
B-5
J9
source of reset info
J9 jumper
use
1-7
jumper headers
MCP750 base board
TMCP700 transition module
jumper settings
for SIMs
B-5
jumpers
J9 (Flash selection)
K
keyboard/mouse
dual function requirement
keyboard/mouse connector
L
LEDs
front panel
3-22
little-endian
2-8
local reset (LRST)
3-21
lowercase
5-15
M
M48T559 Watchdog timer
manufacturers' documents
MCP750
http://www.motorola.com/computer/literature
1-16
B-12
B-12
B-13
1-11
B-14
3-25
1-6
B-4
1-7
3-12
3-12
3-15
C-2
bus capacity
3-3
configuration detail location
handling big & little endian
MCP750 basic contents
MCP750HA
as source of Flash memory
configuration information
debugger console port
default baud rate
1-18
Ethernet connector
3-8
features, hardware
3-1
relation to CPX750HA
unsupport PPCBug commands
voltage connector
1-18
MCP750HA assembly installation
MCP750HA defined
1-1
MCP750HA description
MCP750HA install restrictions
MCP750HA required equipment
memory capacities
3-25
memory map
default
2-3
PCI local bus 2-3,
2-4
memory maps
types
2-2
memory size 6-9,
6-10
modem line support
3-16
MPC750
contents
3-24
MPIC Interrupt Controller
provided by Raven ASIC
MPU bus
processor bus
4-12
MPU initialization
5-3
MPU/PCI bus bridge controller
multiplex support
3-19
multiplexing
when used
3-20
N
NETboot enable
6-7
Network Auto Boot enable
3-18
2-8
1-1
3-24
3-17
1-18
1-1
5-11
1-15
3-2
1-16
1-3
2-6
2-3
6-7
IN-5
I
N
D
E
X
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