Figure 5 - Fft Adc Channel - On-Board Clock - Sundance Spas SMT370v2 User Manual

Version 1.0 Page 15 of 44 SMT370v2 User Manual
The following graphs gives the average FFT of sixteen 16K-FFTs processed after
capturing data from Channel B – The on-board sampling frequency set to 100 MHz –
A 20MHz sine signal is fed to the board. The test has been performed without any
input filter (which explains the second peak due to harmonics) at all and with a 35dBc
harmonic performance signal generator.

Figure 5 - FFT ADC Channel - On-board clock.

Similar results are obtained when using an external clock. It is recommended to use
a low-jitter clock and a filter on the ADC inputs. They indeed have a large input
bandwidth and therefore allow a high level of harmonics in.