Example Code For 3L Diamond - Configuring Registers/Data Capture/Pattern Generator - Sundance Spas SMT370v2 User Manual

Version 1.0
Example code for 3L Diamond – Configuring registers/Data
capture/Pattern Generator.
This code can be used with system where the DAC outputs are connected directly to
the ADC inputs. The DAC is set to work continuously in Pattern Generator mode.
Once sine wave are generated, the ADCs sample them.
//*************************************************
// SMT 370 - Configuring DAC and clock synthesizers
//*************************************************
// This example code is to compiule with 3L Diamond V2.1.6
// Hardware configuration : SMT310Q + SMT365 + SMT370
///////////////
// 3L Header //
///////////////
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <SMT_SDB.h>
#define SMT361
#include "SMT3xx.h"
///////////////////////
// SMT 370 REGISTERS //
///////////////////////
#define REGISTER_0 0x00000400
#define REGISTER_1 0x100000ff
#define REGISTER_2 0x200f0000
#define REGISTER_3 0x30ff0f00
#define REGISTER_4 0x40000000
#define REGISTER_5 0x509907E0
#define REGISTER_6 0x60000033
#define REGISTER_7_LOAD 0x73100000
#define REGISTER_7 0x73200000
#define REGISTER_E 0xe0000000
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// Reg 0 : Real data
// Reg 1 : IDAC Fine Gain = 0xFF
// Reg 2 : IDAC Coarse gain = 0xF
// Reg 3 : QDAC Fine Gain = 0xFF
// Reg 3 : QDAC Coarse Gain = 0xF
// reg5 : On board clocks selected for ADCs and DAC
// Reg5 : ADCs on-board clk=100 MHz (0x990 -> M=0x190=400 and N=0x4~4 => 400/4=100 MHz)
// Reg5 : DACs on-board clk=160 MHz (0xD90 -> M=0x190=400 and N=0x3~3 => 480/3=160 MHz)
// Reg6 : ADC ChannelA : Binary encoding
// Reg6 : ADC ChannelB : Binary Encoding
// Reg7 : DAC ChannelA and ChannelB enabled
// Reg7 : Load Pattern Size register
// Reg7 : DAC ChannelA and ChannelB enabled
// Reg7 : Start Pattern generator
// Reg E : Read back DAC SPI registers
SMT370v2 User Manual