Analog Devices ADSP-BF537 EZ-KIT Lite Getting Started page 80

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Part 3: Tuning Application
page. Note that utilization is modestly less, around 20%. The improve-
ment was not considerable since the processor spent only a minority of its
time in our code, so there was little gain to be made.
Finally, we will increase the speed of the ADSP-BF537 processor. By
default, the EZ-KIT Lite operates at around 270 MHz. We'll use the cus-
tom start-up wizard again to increase the voltage supplied to the part (and,
thus, the clock rate of the processor):
1. Select Project–>Project Options and navigate to the Startup Code
Settings–>Processor Clock and Power page.
2. Enable Configure clock and power settings. Leave EZ-KIT as
ADSP-BF537 EZ-KIT
speed. Click OK.
3. Because we need to make VDK aware of the change, from the Ker-
nel page of the Project window, navigate to
Kernel–>System->Clock Frequency. Change the clock frequency
value to
Build, run, listen, and halt as before. You can see a modest improvement
in performance.
If you still have the Statistical Profiling window open, you may have
noticed that
VDK::HistoryBuffer::AddEntry()
upward of 5% of the processor's capacity (which is a significant fraction of
the processing our application is using). The function is the history-gath-
ering routine within VDK. We can eliminate the impact of the function
by going to the Kernel page, navigating to Kernel–>System, and setting
Instrumentation to None. Note, however, that you no longer can use the
VDK state history displays introduced earlier in this exercise.
3-14
www.BDTIC.com/ADI
. Set Clock and power settings to Optimize for
(MHz).
600
Getting Started with ADSP-BF537 EZ-KIT Lite
function consumes

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