Exercise 1, Part 3: Working With Blackfin Voltage Regulator - Analog Devices ADSP-BF537 EZ-KIT Lite Getting Started

Programming ADSP-BF537 EZ-KIT Lite with VisualDSP++
Figure 1-9. Statistical Profiling: Results after Moving bubble_sort()
If
quick_sort()
time again improves and the relative speed of
returns to the expected ratio.
quick_sort()
The exercise program is small enough to fit entirely into the internal
memory of the processor. In this scenario, VisualDSP++ places the pro-
gram into internal memory by default. However, this is not likely to be
the case for a complex application, where the techniques utilized in this
exercise come into play. The optimal memory configuration varies from
an application to application, possibly involving a blend of caching and
direct L1 placement.
Exercise 1, Part 3: Working with Blackfin
Voltage Regulator
All Blackfin processors, including the ADSP-BF537, include an on-chip
voltage regulator that allows you to control the processor's power con-
sumption and clock. The trade-off is non-linear, that is, an increase in
clock frequency requires a larger voltage which is non-linearly greater than
the clock frequency gain. Conversely, dropping the clock frequency cre-
Getting Started with ADSP-BF537 EZ-KIT Lite
www.BDTIC.com/ADI
is moved to internal memory as well, overall execution
versus
bubble_sort()
1-17