Regulator On/Off And Internal Reset On/Off Availability; Table 1. Regulator On/Off And Internal Reset On/Off Availability - ST STM32F7 Series Application Notes

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Power supplies
The following conditions must be respected:
V
DD
domains.
If the time for V
reach 1.7 V, then PA0 should be kept low to cover both conditions: until V
V12 minimum value and until V
Otherwise, if the time for V
V
DD
If V
CAP
be asserted low externally.
1.3.7

Regulator ON/OFF and internal reset ON/OFF availability

Package
LQFP64
LQFP100
WLCSP100
LQFP144,
LQFP208
LQFP176,
WLCSP143
UFBGA176,
TFBGA216
WLCSP180
1. Available only on the STM32F7x2xx devices.
2. Available only on the STM32F7x3xx devices.
3. Not available on the STM32F72xxx/73xxx devices.
4. Available only on the STM32F767xx/STM32F777xx devices.
5. Available only on dedicated part numbers. Refer to ordering information section of the datasheet.
22/54
should always be higher than V
to reach V12 minimum value is smaller than the time for V
CAP
to reach 1.7 V, then PA0 could be asserted low externally.
goes below V12 minimum value and V

Table 1. Regulator ON/OFF and internal reset ON/OFF availability

Regulator ON
(1)
(2)
Yes
(3)
Yes
(4)
,
BYPASS_REG set
to V
SS
(3)
DocID027559 Rev 5
to avoid a current injection between power
CAP
reaches 1.7 V.
DD
to reach V12 minimum value is smaller than the time for
CAP
DD
Regulator OFF
No
Yes
BYPASS_REG set
to V
DD
(5)
Yes
is higher than 1.7 V, then PA0 must
Internal reset ON
Yes
Yes
PDR_ON set to
PDR_ON set to
V
DD
AN4661
to
DD
reaches
CAP
Internal reset
OFF
No
Yes
V
SS

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