Regulator Off Mode - ST STM32F7 Series Application Notes

AN4661
1.3.6

Regulator OFF mode

Refer to Voltage regulator section in the datasheet for details.
•
When BYPASS_REG = V
and V
–
–
–
•
In regulator OFF mode, the following features are no more supported:
–
–
–
–
1. V
CAP2
V
CAP1.
pins connected together.
CAP2
The two V ceramic capacitors should be replaced by two 100 nF decoupling
CAP
capacitors.
Since the internal voltage scaling is not managed internally, the external voltage
value must be aligned with the targeted maximum frequency.
When the internal regulator is OFF, there is no more internal monitoring on V12.
An external power supply supervisor should be used to monitor the V12 of the
logic power domain (V
PA0 pin should be used for this purpose, and act as power-on reset on V12 power
domain.
PA0 cannot be used as a GPIO pin since it allows to reset a part of the V12 logic
power domain which is not reset by the NRST pin.
As long as PA0 is kept low, the debug mode cannot be used under power-on
reset. As a consequence, PA0 and NRST pins must be managed separately if the
debug connection under reset or pre-reset is required.
The over-drive and under-drive modes are not available.
The Standby mode is not available.
Figure 14. BYPASS_REG supervisor reset connection
is not available on all packages. In that case, a single 100 nF decoupling capacitor is connected to
, the core power supply should be provided through V
DD
).
CAP
DocID027559 Rev 5
Power supplies
CAP1
21/54
53