Receive Control Register; Figure 3.2 Timing When A Receive Message Lost Occurs - Toshiba TXZ Series Reference Manual

Receive Control Register

The ID of a received message is compared to the ID of the mailbox set as the receive mailbox. The comparison of
the IDs depends on the [CANMBnID]<GAME_LAME> values of the global/local acceptance mask enable bit and
the data held in the global/local acceptance mask registers [CANGAM]/[CANLAM].
When a match is detected, the ID of the received message, the control bits, and data bytes are written in the
matching mailbox. At the same time, when the corresponding receive message pending bit [CANRMP]<RMPn>
is set to "1" and the mailbox interrupt is enabled ([CANMBIM]<MBIMn>=1), the CAN receive completion
interrupt (INTCANRXD) occurs. After a match is detected, no further ID comparison takes place.
If the ID of the received message does not match with any of the mailboxes 0 to 30, the ID is compared to the ID
of the receive-only mailbox 31. When a match is detected, the settings of the received message are written in
receive-only mailbox 31.
If no match is detected, the received message will not be stored in the mailbox and no change occurs in the
mailbox.
The <RMPn> bit must be cleared by the CPU after data is read. With the <RMPn> bit set to "1", if the next
message to this mailbox n is received, the corresponding receive message lost bit <RMLn> is set to "1".
In this case, mailbox n is overwritten with the new message.
Figure 3.2 shows timing when a receive message lost occurs.
CAN Bus
Message is valid
Set <RMP>
[CANRMP] register
Set <RML>
[CANRML] register
Copy ID and data to
mailbox
2018-10-30
Message 1
SOF
for mailbox "n"

Figure 3.2 Timing when a Receive Message Lost Occurs

Message 2
EOF IFS SOF
for mailbox "n"
14 / 54
TXZ Family
CAN Controller
EOF IFS
Rev. 1.1