Table 3.2 Restrictions When Setting The Baud Rate - Toshiba TXZ Series Reference Manual

32-bit risc microcontroller. can controller (can-a)
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Information processing time (IPT) is the time segment starting with the sample point reserved for processing of
the sampled bit level. The information processing time is equal to three CAN system clock cycles.
[CANBCR2]<SJW[1:0]> indicates how much the time quantum (T
lengthened or shortened
When resynchronizing. Values between "1" ([CANBCR2]<SJW[1:0]> = 00) and "4" (<SJW[1:0]> = 11) are
adjustable.
The bus line is sampled and synchronization is performed at each falling edge of the bus signal within a bit grid.
For [CANBCR2]<SJW[1:0]>, set a value equal to or smaller than [CANBCR2]<TSEG2[2:0]>.
Setting the [CANBCR2]<SAM> bit enables the multiple sampling of the bus line. The level is determined by the
result from the majority decision of three sampling values. Sampling is taken at the sample point and the previous
last two CAN system clock points. When [CANBCR1]<BRP[9:0]> is smaller than 4, the sampling performed is
always once regardless of the value set in the [CANBCR2]<SAM> bit.
Table 3.2 shows the restrictions when the baud rate is set.
[CANBCR1]
<BRP[9:0]>
(number of CAN clock cycles)
0
1
> 1
Restrictions for [CANBCR2]
TSEG1> ≥
[CANBCR2]
<
than the length of TSEG2.
Restrictions for [CANBCR2]<
SJW> ≤
[CANBCR2]<
smaller than <TSEG2>.
Restrictions for
[CANBCR2]
The three-time sampling is not allowed under the condition that
condition that [CANBCR1]<BRP[9:0]> < 4, a one-time sampling will always be performed
For the
regardless of the value of SAM.
Example: For 500 Kbit/s
A bit has a length of 2μs. If f
transmission rate has to be programmed with a length of 12T
programmed always are smaller by one than the calculated values:
<BRP[9:0]> = 0000000001
[CANBCR1]
[CANBCR2]
<TSEG1[3:0]> = 0110 (7T
[CANBCR2]
<TSEG2[2:0]> = 011 (4T
In this case, the sample point is 8 / 12 = 66%
Other combinations for
<SJW>.
2018-10-30
Restrictions when Setting the Baud Rate
Table 3.2
T
Q length
(number of CAN clock cycles)
1
2
<BRP[9:0]>+1
TSEG1>
<
[CANBCR2]<
TSEG2>:
SJW>
TSEG2>:
[CANBCR2]<
<SAM>
= 12 MHz, the baud rate prescaler is set to "1". That means a bit for this data
CANOSC
)
Q
)
Q
TSEG1> / <TSEG2> are possible; with <TSEG2> = 3 the full range for
[CANBCR2]<
) value in bit length is allowed to be
Q
Minimum [CANBCR2]<TSEG2> length
IPT length
3
3
3
The length of <TSEG1> should be equal to or greater
For the synchronization jump width, set a value equal to or
[CANBCR1]
According to the above formula, the values to be
Q
.
26 / 54
TXZ Family
CAN Controller
T
(
Q unit)
3
2
2
<BRP[9:0]> is smaller than 4.
Rev. 1.1

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