Service Request Line (Srq); Service Request Enable Register (Sre); Programming The Sre; Event Status Register (Esr) - Fluke 5790B Operator's Manual

Ac measurement standard
Hide thumbs Also See for 5790B:
Table of Contents

Advertisement

5790B
Operators Manual

Service Request Line (SRQ)

Service Request (SRQ) is an IEEE-488.1 bus control line the Product asserts to
notify the controller that it requires some type of service. Many instruments can
be on the bus, but they all share a single SRQ line. To determine which
instrument set SRQ, the Controller normally does a serial poll of each instrument.
The Product asserts SRQ whenever the RQS bit in its Status Byte Register is 1.
This bit informs the controller that the Product was the source of the SRQ.
The Product clears SRQ and RQS whenever the controller performs a serial poll
of the Product IEEE-488 interface or sends *CLS, or whenever the MSS bit is
cleared. The MSS bit is cleared only when RID, ESB, MAV, EAV, and ISCB are
0, or they are disabled by their associated enable bits in the SRE register being
set to 0.

Service Request Enable Register (SRE)

The Service Request Enable Register (SRE) enables or masks the bits of the
Status Byte Register. The SRE is cleared at power up. Refer to "Status Byte
Register" for the bit functions.

Programming the SRE

By setting (to 0) the bits in the SRE, you can mask (disable) associated bits in
the Status Byte Register. Bits set to 1 enable the associated bit in the Status
Byte Register.

Event Status Register (ESR)

The Event Status Register is a two-byte register in which the higher eight bits are
always 0, and the lower eight bits except bits 6 and 1 represent various
conditions of the Product. The ESR is cleared (set to 0) every time it is read. The
ESR register is set to 128 at power on.

Event Status Enable Register (ESE)

A mask register called the Event Status Enable register (ESE) allows the
controller to enable or mask (disable) each bit in the ESR. When a bit in the ESE
is 1, the corresponding bit in the ESR is enabled. When any enabled bit in the
ESR is 1, the ESB bit in the Status Byte Register also goes to 1. The ESB bit
stays 1 until the controller reads the ESR or sends the *CLS command to the
Product. The ESE is cleared (set to 0) when the power is turned on.
6-76

Advertisement

Table of Contents
loading

Table of Contents