Fig. 8-6: Example For The Or Logic: Egde-Change Interrupt; Table 8-1: Principle Of The Or Logic (For 2 Channels) - Addi-Data APCI-2032 Technical Description

APCI-1032, APCI-1564 and APCI-2032
By OR logic pulses and bounces can generate an interrupt.
The following parameters are set in the figure below:
st
1 condition: The channels 0/4 and 1/5 react to rising edges (Modus_1 = 11).
nd
2 condition: The channels 0/4 and 1/5 react to falling edges (Modus_2 = 11).

Fig. 8-6: Example for the OR logic: Egde-change interrupt

INPUT 1/5 INPUT 0/4
MODUS2, MODUS1
MODUS2,
MODUS1
0,0 0,0
1,0 0,0
0,1 0,0
1,1 0,0
0,0 1,0
1,0 1,0
0,1 1,0
1,1 1,0
0,0 0,1
1,0 0,1
0,1 0,1
1,1 0,1
0,0 1,1
1,0 1,1
0,1 1,1
1,1 1,1
* 10: Interrupt source: the 2
** 01: Interrupt source: the 1

Table 8-1: Principle of the OR logic (for 2 channels)

Input 0/4
Input 1/5
no interrupt
nd
input (channel 1/5) has generated an interrupt.
st
input (channel 0/4) has generated an interrupt.
10*
10
10 10
01**
01 10
10 01
10 01 10
01
01 10
01 10
01 10 10
01 01
01 01 10
01 10 01
01 10 01 10
Functions of the board
10
10
10 10
01
01 10
10 01
10 01 10
01
01 10
10 01
10 01 10
01 01
01 01 10
10 01 01
10 01 01 10
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