Motorola CPCI-6020 Installation And Use Manual page 159

Compactpci single board computer
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CNFG and ENV Commands
Stop Auto Boot after selftest failure [Y/N] = N?
Y
If selftest fails do not autoboot.
N
Selftest results do not affect autoboot process.
Memory Size Enable [Y/N] = Y?
Y
Memory will be sized for Self Test diagnostics.
N
Memory will not be sized for Self Test diagnostics.
Memory Size Starting Address = 00000000?
The default Starting Address is $00000000.
Memory Size Ending Address = 70000000?
The default Ending Address is the calculated size of local memory. If the memory start is
changed from $00000000, this value will also need to be adjusted.
DRAM Speed in NANO Seconds = 10?
The default setting for this parameter will vary depending on the speed of the DRAM memory
parts installed on the board. The default is set to the slowest speed found on the available
banks of DRAM memory.
ROM Bank A Access Speed (ns) = 150?
This is the access speed in nanoseconds of the device.
ROM Bank B Access Speed (ns) = 120?
This is the access speed in nanoseconds of the device.
DRAM Parity Enable [On-Detection/Always/Never - O/A/N] = 0?
O
DRAM parity is enabled upon detection. (Default)
A
DRAM parity is always enabled.
N
DRAM parity is never enabled.
The parameter (above) also applies to enabling ECC for DRAM.
L2 Cache Parity Enable [On-Detection/Always/Never - O/A/N] = 0
O
L2 Cache parity is enabled upon detection. (Default)
A
L2 Cache parity is always enabled.
N
L2 Cache parity is never enabled.
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CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
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Configuring the PPCBug Parameters

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