Block Diagram Video - Philips 32PF9968/10 Service Manual

Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Video

VIDEO
B03B MAIN TUNER
7T57
TDA9897HL/V2
1T04 1T06
4 IF-FILTP1 7
TD1736OF/FHFXP IF1-B
11 IF-OUT 1
IF-OUT
5 IF-FILTN1 6
IF1-A
SAW 45MHz
1T55
4 IF-FILTP3 3
MAIN HYBRID
IF3-A
1
TUNER
5 IF-FILTN3 4
IF3-B
SAW 44MHz
IF-OUT 4
IF2-B
3 TUN-AGC 47
ERF-GAIN TAGC
8 4-MHz 46
4-MHZ FREF
4
FM-TRAP 7T12
FM-TRAP-SWITCH TDA-IF-AGC 36
VTU AGC-DIN
9
V2
B03A
CHANNNEL DECODER
7T18
TDA10060HL
142
AGCT_CTL
115
GPIO-2
21
XTAL-P
1T69
54M
20
XTAL-N
B09A
B08D USA EXTERNALS
HDMI
1008
1B01
PR
1 ARX2+
3
ARX2-
4 PB
ARX1+
6
ARX1-
7 Y
ARX0+
9
ARX0-
10 AV1
ARXC+
1006
12
ARXC-
13 PCEC-HDMI
B04A
15 VIDEO
ARX-DCC-SCL
16 ARX-DCC-SDA
HDMI 1
1007
CONNECTOR
7JE3 1
19 ARX-HOTPLUG
3
HOT-PLUG S VIDEO 5
B04H
4
1B02
2
1 BRX2+
1011
3 BRX2-
4 BRX1+
AV2 VIDEO
6 BRX1-
7
BRX0+
9 BRX0-
1009
10
BRXC+
12
BRXC- PR
13 PCEC-HDMI
B04A
15
BRX-DCC-SCL AV3 PB
16
BRX-DCC-SDA
HDMI 2
CONNECTOR Y
19 BRX-HOTPLUG 7JA3
HOT-PLUG
B04H
1B03
1 CRX2+
D
SIDE FACING SIDE AV
3 CRX2-
4 CRX1+
1302
6
CRX1-
7
CRX0+
9 VIDEO
CRX0-
10
CRXC+
1301
12
CRXC- 1
3
13 PCEC-HDMI
B04A S VIDEO 5
15
CRX-DCC-SCL 4
2
16
CRX-DCC-SDA
HDMI 3
CRX-HOTPLUG 7J28
19 B08F
CONNECTOR HDMI SWITCH
HOT-PLUG
B04H
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
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Q523.1U LA 6.
B04
PNX85xx
7J00
PNX8537E
7T59
B04K ANALOGUE AV
EF
33 CVBS4 J3
CVBS
IF
PROCESSING
3T59
26 TDA-IF-IN-N IF-N M1
OUT1-A
3T58
27 TDA-IF-IN-P IF-P M2
OUT1-B
16 TUN-AGC-MON
MPP-2
7T06
141
AGCT-CTL
3
GPIO-0
8
IF-N
7
DTV IF-P
B04N VIDEO
RECEIVER
STREAMS
DATA FE-DATA(0-7)
SWITCH/
ADC/MUX/SRC
AV1_PR K2
AV1_PB
P5
AV1_Y
F2
AV1_Y-CVBS H2
AV1_C
N4
AV2_Y-CVBS J1
AV3_PR K3
AV3_PB
R1
AV3_Y
G1
B09B
1304 1M36
FRONT_Y_CVBS_IN 2 2 FRONT_Y-CVBS J2
4 4 FRONT_C
P2
FRONT_C_IN
7J27
AD8191ASTZ
74
B04H DIGITAL VIDEO
73 34 RXC+ A10
IN
OP0
71
33 RXC- A9
ON0
70
HDMI
68
SWITCH
67 37 RX0+ B7
OP1
65
HDMI-DVI RX/RX2DTL
RX0-
36 B6
ON1
64 RECEIVER
DETECTION
12
MATRICING
11 40 RX1+ A8
OP2
9
39 RX1- A7
ON2
8
6
5 43 RX2+ B9
OP3
3
RX2-
42 B8
2 ON3
24
23
21
20
44 RESET-SYS-DETECT
B04E
18
17
15
14
47
B05C
FPGA 1080P: I/O BANKS
7F90
EP2C8F256C7N
PNX85xx
CYCLONE
MAIN
VIDEO OUT DV-R(0-7)
VIDEO
VIDEO FPGA
LAYER
OUTPUT 1080P
DV-G(0-7)
CONFIG
GFX LAYER
LVDS
STILL
TRANSMITTER
MPEG/PC
DV-B(0-7)
GFX OSD
LAYER
AG15 DV-HS D13
AH15 DV-VS
G13
MBVP-TV
SNR/TNR
B04Q PNX85xx: FLASH
EDDI
HV SCALER
7HA0
NAND512W3A2BN6E
B04F CONTROL
NAND
FLASH
PCI XIO
MEMORY
PCI --> NAND
128Mx8
CONTROLLER
MSP
VMPG
MPEG
DEMUX
AND
B04G
PNX 85xx: SDRAM
DECODING
7HG0
K4D551638F
(0-12) DDR
SDRAM 1
VIDEC, 3D COMB AND VBI
B04G SDRAM 8Mx16x4
CAPTURING
DDR2-D(0-15)
7HG1
DDR
K4D551638F
DDR
DDR2-A(0-12)
SDRAM 2
8Mx16x4
(16-31)
DYNAMIC FRAME INSERTION
AB02 VIDEO FLOW
1F50
1
+12V-SSB
2
3
4
10
RXEA-
11
RXEA+
12
RXEB-
13 RXEB+
14 RXEC-
15 RXEC+
17 RXECLK-
18 RXECLK+
20 RXED-
21 RXED+
22 RXEE-
23
RXEE+
25
RXOA-
26 RXOA+
27 RXOB-
28 RXOB+
39 RXOC-
30 RXOC+
32 RXOCLK-
33 RXOCLK+
35 RXOD-
36
RXOD+
37
RXOE-
38
RXOE+
40
SCL-I2C4-SSB
41
SDA-I2C4-SSB
AB07 DDR A
7CA2
EDD1216AJTA
DDR
SDRAM
2Mx16
7CA3
EDD1216AJTA
DDR
SDRAM
2Mx16
B05A B06C B06A
FPGA 1080P: PACIFIC 3
I/O BANKS
7GE2
T6TF4HFG
TxFPGAoA- RxP3oA-_B9 75
B14 8
TxFPGAoA+ RxP3oA+_B8 74
A14 10
PACIFIC3
TxFPGAoB- RxP3oB-_B7 78
C13 13
TxFPGAoB+ RxP3oB+_B6 PICTURE 77
C12 14
II
ENHANCEMENT
B13 TxFPGAoC- RxP3oC-_B5 15 81
A13 TxFPGAoC+ RxP3oC+_B4 16 80
B12 TxFPGAoCLK- RxP3oCLK-_B3 19 84
A12 TxFPGAoCLK+ RxP3oCLK+_B2 20 83
TxFPGAoD- RxP3oD-_B1 87
D11 22
TxFPGAoD+ RxP3oD+_B0 86
D10 23
B10 TxFPGAoE- RxP3oE-_G9 25 90
A10 TxFPGAoE+ RxP3oE+_G8 26 89
A7 TxFPGAeA- RxP3eA-_G7 28 93
B7 TxFPGAeA+ RxP3eA+_G6 29 92
TxFPGAeB- RxP3eB-_G5 96
D6 31
C6 TxFPGAeB+ RxP3eB+_G4 31 95
TxFPGAeC- RxP3eC-_G3 99
B6 34
TxFPGAeC+ RxP3eC+_G2 98
A6 35
TxFPGAeCLK- RxP3eCLK-_G1 101
B5 37
A5 TxFPGAeCLK+ RxP3eCLK+_G0 38 100
TxFPGAeD-_ RxP3eD-_R9 103
B4 40
TxFPGAeD+ RxP3eD+_R8 102
A4 41
B3 TxFPGAeE- RxP3eE-_R7 44 107
A3 TxFPGAeE+ RxP3eE+_R6 45 106
7GE1
M25P05
512K
FLASH
AB06 FPGA DFI AB02 VIDEO FLOW
7F18
EP2C35F484C7N
C2
C1
D4 CYCLONE II
D3
FPGA
AB05
D2 DFI FPGA: POWER +
D1 CONTROL
E2
7F30
E1
EPCS16SI16N
E4
C3 nSCO
E3 7
SCD
F2
L6 DCLK 16
F1
C4 ASDO 15
G5
SDA-I2C4-DISP
G6
SCL-I2C4-DISP
H4
G3
H2
H1
L2
L1
J2
J1
H6
H5
AB03 CLOCK
7F51
VDISP
W4 SS-OFF 1
EOH
3
OUT
50M
B12 CLK-SYSTEM-SS
AB08
DDR B
7CA0
EDD1216AJTA
(0-11) (0-12) DDR
SDRAM 1
2Mx16
DQ1(0-15) DQ2(0-15)
7CA1
EDD1216AJTA
DDR
MM1-A(0-11) MM2-A(0-11)
SDRAM 2
2Mx16
(16-31) (16-31)
PACIFIC 3: LVDS
DUAL LVDS ONLY
1G50
TXEA- 5G00 32
TXEA+ 31
TXEB- 5G01 30
TXEB+ 29
5G02 28
TXEC-
27
TXEC+
5G03 25
TXECLK-
24
TXECLK+
TXED- 5G04 22
TXED+ 21
5G05 20
TXEE-
LVDS
19
TXEE+
CONNECTOR
TO DISPLAY
OR
TXOA- 5G06 17
TCOA+ 16
TCOB- 5G07 15
TCOB+ 14
TCOC- 5G08 13
TCOC+ 12
TCOCLK- 5G09 10
TCOCLK+ 9
TCOD-_ 5G10 7
TCOD+ 6
TCOE- 5G11 5
TCOE+ 4
1F52
32
LVDS
CONNECTOR
TO DISPLAY
1
1F51
49
50
40
LVDS
CONNECTOR
TO DISPLAY
9
5
4
3
2
1
H_16770_071.eps
Only for 120Hz Dynamic Frame Insertion
070907