Philips 32PF9968/10 Service Manual page 152

更多难得资料请到江南家电维修论坛免费下载！
http://bbs.520101.com
EN 152 9. Q523.1U LA
CYCLONE II FPGA (MOP) (EP2C8F256C7N)
The CYCLONE II performs the following tasks:
• Conversion from CMOS (YUV) to LVDS.
• AmbiLight.
• Pattern generator.
The CYCLONE II interfaces:
• Video input (single CMOS in) and output (dual LVDS out).
2
• AmbiLight output (I C).
2
• I C input control (from PNX85xx).
• Flash memory.
Refer to figures "CYCLONE II CMOS input interface",
"CYCLONE II dual LVDS output interface" and CYCLONE II
2
"I C AmbiLight interface" for details about interfacing.
CMOS input CMOS input
Figure 9-19 CYCLONE II CMOS input interface (diagram B05C)
Dual LVDS output Dual LVDS output
Figure 9-20 CYCLONE II dual LVDS output interface (diag. B05C)
I2C-Ambi
2
Figure 9-21 I C AmbiLight interface (diagram B05C)
The CYCLONE II has dedicated DC-DC converters which
convert the 3.3 V coming from the platform DC-DC converters.
They generate:
• 2.5 V.
• 1.2 V.
Refer to diagrams B05B and B05C for details.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
H_16770_134.eps
270307
H_16770_135.eps
270307
Single LVDS - in ( PNX85xx)
Double LVDS in ( FPGA)
Figure 9-22 PACIFIC 3 CMOS + LVDS interface (diagram B06C)
H_16770_136.eps
280307
A configuration flash memory is added (item 7FA3). After start-
up and after configuration has been successful, the LED (item
7FA1) lights up during normal operation. Not burning of this
LED indicates the absence of the 2.5 and 1.2 V power lines of
the dedicated DC-DC- converters, or the flash memory is
empty, or the flash memory cannot be reached from the
CYCLONE II.
PACIFIC 3 (T6TF4HFG)
The PACIFIC 3 performs the following tasks:
• Color processing.
• Sharpness improvement.
• Backlight dimming.
• AmbiLight.
• Display (LVDS) switch on/off.
• Pattern generator.
The PACIFIC 3 interfaces:
• Video input:
– US sets: single LVDS from PNX85xx, dual LVDS from
CYCLONE II
– CMOS from PNX5050
• Video output: LVDS (single or dual) to display or DFI panel.
• Backlight dimming: pulse-width modulated (PWM) followed
2
by PWM to I C conversion.
• AmbiLight: pulse-width modulated (PWM) followed by
microprocessor.
Refer to figure "PACIFIC 3 CMOS + LVDS interface" for details.
A configuration flash memory is added (item 7GE1).
PWM ambi
to µP
Single or double
LVDS -out to display
H_16770_137a.eps
240707