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Expansion Format of Extended Instructions (2)
Extended instruction
Opcode
Operand
sld.a
%rd, symbol±imm20
Example) sld.a %rd, symbol+imm20
%sp, symbol±imm20
Example) sld.a %sp, symbol-imm20
xld.b
%rd, [%sp+imm24]
xld.ub
xld
xld.a
Example) xld.b %rd, [%sp+imm24]
%rd, [imm24]
Example) xld %rd, [imm24]
xld.b
[%sp+imm24], %rs
xld
xld.a
Example) xld.b [%sp+imm24], %rs
[imm24], %rs
Example) xld [imm24], %rs
xld
%rd, imm 16
Example) xld %rd, imm16
%rd, symbol±imm16
Example) xld %rd, symbol+imm16
Remarks
Condition 1
Unconditional
ext
(symbol+imm20)(19:7)
ld.a
%rd, (symbol+imm20)(6:0)
Unconditional
ext
(symbol-imm20)(19:7)
ld.a
%sp, (symbol-imm20)(6:0)
imm24≤0x7f
ld.b
%rd, [%sp+imm24(6:0)]
imm24≤0x7f
ld
%rd, [imm24(6:0)]
imm24≤0x7f
ld.b
[%sp+imm24(6:0)], %rs
imm24≤0x7f
ld
[imm24(6:0)], %rs
imm16≤0x7f
ld
%rd, imm16(6:0)
Unconditional
ext
(symbol+imm16)(15:7)
ld
%rd, (symbol+imm16)(6:0)
Expansion format
Condition 2
—
—
0x7f<imm24≤0xfffff
ext
imm24(19:7)
ld.b
%rd, [%sp+imm24(6:0)]
0x7f<imm24≤0xfffff
ext
imm24(19:7)
ld
%rd, [imm24(6:0)]
0x7f<imm24≤0xfffff
ext
imm24(19:7)
ld.b
[%sp+imm24(6:0)], %rs
0x7f<imm24≤0xfffff
ext
imm24(19:7)
ld
[imm24(6:0)], %rs
0x7f<imm16
ext
imm16(15:7)
ld
%rd, imm16(6:0)
—
Assembly Programming
Condition 3
—
—
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
ld.b
%rd, [%sp+imm24(6:0)]
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
ld
%rd, [imm24(6:0)]
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
ld.b
[%sp+imm24(6:0)], %rs
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
ld
[imm24(6:0)], %rs
—
—
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