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Expansion Format of Extended Instructions (1)
Extended instruction
Opcode
Operand
sld.b
%rd, [%sp+imm20]
sld.ub
sld
sld.a
Example) sld.b %rd, [%sp+imm20]
%rd, [imm20]
Example) sld %rd, [imm20]
sld.b
[%sp+imm20], %rs
sld
sld.a
Example) sld.b [%sp+imm20], %rs
[imm20], %rs
Example) sld [imm20], %rs
sld
%rd, imm16
Example) sld %rd, imm16
%rd, symbol±imm16
Example) sld %rd, symbol+imm16
sld.a
%rd, imm20
Example) sld.a %rd, imm20
%sp, imm20
Example) sld.a %sp, imm20
Remarks
Condition 1
imm20≤0x7f
ld.b
%rd, [%sp+imm20(6:0)]
imm20≤0x7f
ld
%rd, [imm20(6:0)]
imm20≤0x7f
ld.b
[%sp+imm20(6:0)], %rs
imm20≤0x7f
ld
[imm20(6:0)], %rs
imm16≤0x7f
ld
%rd, imm16(6:0)
Unconditional
ext
(symbol+imm16)(15:7)
ld
%rd, (symbol+imm16)(6:0)
imm20≤0x7f
ld.a
%rd, imm20(6:0)
imm20≤0x7f
ld.a
%sp, imm20(6:0)
Expansion format
Condition 2
0x7f<imm20
ext
imm20(19:7)
ld.b
%rd, [%sp+imm20(6:0)]
0x7f<imm20
ext
imm20(19:7)
ld
%rd, [imm20(6:0)]
0x7f<imm20
ext
imm20(19:7)
ld.b
[%sp+imm20(6:0)], %rs
0x7f<imm20
ext
imm20(19:7)
ld
[imm20(6:0)], %rs
0x7f<imm16
ext
imm16(15:7)
ld
%rd, imm16(6:0)
—
0x7f<imm20
ext
imm20(19:7)
ld.a
%rd, imm20(6:0)
0x7f<imm20
ext
imm20(19:7)
ld.a
%sp, imm20(6:0)
Assembly Programming
Condition 3
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