Data Bus Structure; Microprocessor; Mc68040 Cache - Motorola 700 Series Installation And Use Manual

Data Bus Structure

The local bus on the MVME162LX is a 32-bit synchronous bus that
is based on the MC68040 bus, and which supports burst transfers
and snooping. The various local bus master and slave devices use
the local bus to communicate. The local bus is arbitrated by priority
type arbiter and the priority of the local bus masters from highest to
lowest is: 82596CA LAN, 53C710 SCSI, VMEbus, and MPU. In the
general case, any master can access any slave; however, not all
combinations pass the common sense test. Refer to the
MVME162LX Embedded Controller Programmer's Reference Guide and
to the user's guide for each device to determine its port size, data
bus connection, and any restrictions that apply when accessing the
device.

Microprocessor

The MVME162LX is built with a 32MHz MC68040 microprocessor.
The MC68040 has on-chip instruction and data caches, optional
high drive I/O buffers, and a floating point processor. The
MC68040 supports cache coherency in multi-master applications
with dedicated on-chip bus snooping logic. Refer to the M68040
reference manual for detailed information.

MC68040 Cache

The MVME162LX local bus masters (VMEchip2, MC68040, 53C710
SCSI controller, and 82596CA Ethernet controller) have
programmable control of the snoop/caching mode. The IP DMA
local bus master's snoop control function is controlled by jumper
settings at J19. J19 controls the state of the snoop control signals for
all IP DMA transfers (including the IP DMA which is executed
when the DMA control registers are updated during IP DMA
operation in the command chaining mode). The MVME162LX local
bus slaves that support MC68040 bus snooping are defined in the
Local Bus Memory Map table later in this chapter.
Block Diagram
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