Advanced Chipset Features - Shuttle FB75 User Manual

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Advanced Chipset Features

These items define critical timing parameters of the mainboard. You should
leave the items at their default values unless you are very familiar with the
technical, specifications of your system hardware. Changing values in-
correctly may lead to fatal errors or recurring instability into your system.
DRAM Timing Selectable
The value in this field depends on performance parameters of the
installed memory chips (DRAM).
Ø The Choice: Manual or By SPD.
CAS Latency Time
This item defines the timing delay in clock cycles before SDRAM starts a
read command after receiving it.
Ø The Choice: 2, 2.5, or 3.
Active to Precharge Delay
This item defines the numbers of cycles for RAS to be allowed to precharge.
Ø The Choice: 8, 7, 6, or 5.
DRAM RAS# to CAS# Delay
This item defines the timing of the transition from RAS (row address strobe)
to CAS (column address strobe) as both rows and columns are separately
addressed shortly after DRAM is refreshed.
Ø The Choice: 4, 3, or 2.
DRAM RAS# Precharge
This item defines the timing delay for DRAM precharge.
Ø The Choice: 4, 3, or 2.
Memory Frequency For
This item is select SDRAM Frequency.
Ø The Choice: DDR266, DDR333, DDR320, DDR400, or Auto.
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