Advanced Chipset Features - Shuttle FB65 Manual

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Advanced Chipset Features

This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and access
to system memory resources, such as DRAM and the external cache. It also
coordinates communications between the conventional ISA bus and the PCI
bus. It states that these items should never need to be altered.
The default settings have been chosen because they provide the best
operating conditions for your system. If you discovered that data was being
lost while using your system, you might consider making any changes.
DRAM Timing Selectable
The value in this field depends on performance parameters of the
installed memory chips(DRAM). Don't change the value from the
factory setting unless you install new memory that has a different perfor-
mance rating than the original DRAMs.
Ø The Choice: Manual or BySPD
CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing. Don't change this field
from the default value specified by the system designer.
Ø The Choice: 2, 2.5, or 3.
Active to Precharge Delay
The precharge time is the number of cycles it takes for DRAM to accu-
mulate its charge before refresh.
Ø The Choice: 8, 7, 6, or 5.
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