Advanced Chipset Features - Shuttle FS56 User Manual

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Advanced Chipset Features

This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and access
to system memory resources, such as DRAM and the external cache. It also
coordinates communications between the conventional ISA bus and the PCI
bus. It states that these items should never need to be altered.
The default settings have been chosen because they provide the best
operating conditions for your system. If you discovered that data was being
lost while using your system, you might consider making any changes.
DRAM Clock/Timing Control
Options are in its sub-menu.
Press <Enter> to enter the sub-menu of detailed options.
Performance Mode
This item allows you to enable/disable the performance mode.
Ø The Choice: Enabled or Disabled.
DRAM Timing Control
This item allows you to select the value in this field, depending on
whether the board using which kind of DDR DRAM.
Ø The Choice: By SPD or Manual.
DRAM CAS Latency
This item defines the timing delay in clock cycles before DARM starts a
read command after reveiving it.
Ø The Choice: 2T, 2.5T or 3T.
RAS Active Time(tRAS)
This item defines the RAS active time.
Ø The Choice: 4T, 5T, 6T, 7T, 8T or 9T.
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