Smbus Connector (Cn1); Digital I/O Connector (Cn2) - AXIOMTEK CAPA84R User Manual

Intel celeron j1900/j1800 processor 3.5" board
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CAPA84R Capa Board
2.4.1

SMBus Connector (CN1)

This is a 3-pin (pitch=2.0mm) wafer connector which is compliant with JST
B4B-PH-SM3-TB for SMbus interface. The SMBus (System Management Bus) is a
simple bus for the purpose of lightweight communication.
Pin
1
2
3
2.4.2

Digital I/O Connector (CN2)

This is a 2x5-pin (pitch=2.0mm) connector. The board is equipped with an 8-bit digital
I/O that meets requirements for a system customary automation control. The digital I/O
can be configured to control cash drawers and sense warning signals from an
Uninterrupted Power System (UPS), or perform store security control. You may use
software programming to control these digital signals, please refer to Appendix B.
Pin
Signal
Digital Input Output 0
1
(Default: Output)
Digital Input Output 1
3
(Default: Output)
Digital Input Output 2
5
(Default: Output)
Digital Input Output 3
7
(Default: Output)
9
+5V level
12
Signal
CLK
DATA
GND
Pin
Signal
2
Digital Input Output 7
(Default: Input)
4
Digital Input Output 6
(Default: Input)
6
Digital Input Output 5
(Default: Input)
8
Digital Input Output 4
(Default: Input)
10
GND
1
Board and Pin Assignments

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